CMOS PLL Synthesizers: Analysis and Design

This book presents both fundamentals and the state of the art of PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis are covered. A 16mW, 2.4GHz, sub-2V, Sigma Delta fractional-N synthesizer prototype is implemented in 0.35m m CMOS. It features a high-speed and robust phase-switching prescaler, and a low-complexity and area-efficient loop capacitance mulitplier, which tackle speed and integration bottlenecks of PLL synthesizer elegantly.

This book is conceived as a PLL synthesizer manual for both academia researchers and industry design engineers.

College professors and students in the area of analog integrated circuit (IC) design, and analog IC designers in the semiconductor industry worldwide